1. Field of the Invention
The present invention generally relates to processes for fabricating semiconductor devices. More particularly, this invention relates to a process of producing encapsulation die through a process that simultaneously forms cavities and through-holes in a semiconductor wafer and provides both quality and cost improvements over current techniques.
2. Description of the Related Art
Within the semiconductor industry, there are numerous applications that require encapsulating the surface of a semiconductor die. As an example, a microelectromechanical system (MEMS) device formed in or on a semi-conductor die (referred to herein as a device die) is often capped by a semiconductor or glass die (referred to herein as a cap die), forming a package that defines a cavity within which the MEMS device, such as a suspended diaphragm or mass, is enclosed and protected. Examples of MEMS devices protected in this manner include accelerometers, rate sensors, actuators, pressure sensors, etc.
For mass production, numerous MEMS devices are simultaneously fabricated in a device wafer that is bonded to an encapsulation (cap) wafer, after which the resulting wafer stack undergoes a dicing operation to singulate individual die packages from the wafers. The cavities are usually defined by recesses formed in the cap wafer by photolithographic/etch techniques. By the very nature of their operation, MEMS devices must be free to move to some degree, necessitating that the size and shape of the cavity within each package be adequate and consistently defined. However, current methods for processing cap wafers for MEMS devices are often plagued with yield loss and quality defects.
The difficulty in processing cap wafers revolves around the need to etch holes all the way through the cap wafer in order to provide access to bond pads on the device wafer. Existing processes utilize photolithographic/etch techniques to form the through-holes and recesses required by cap wafers. As is well known in the art, photolithography involves the use of light to effect the transfer of a pattern from a mask to a wafer, and using the pattern as a mask during etching of the wafer to define structural features, such as the holes and recesses in the cap wafer. Creating these through-holes using photolithographic/etch techniques requires processing both sides of the wafer and maintaining alignment of features on both sides. Inherently, photolithographical patterning of the wafers requires individual handling of the wafers through several steps to create the pattern on the wafer. If both surfaces of the cap wafer are being patterned, the patterned side of the wafer must be placed against wafer handling fixtures in order to process the opposite surface of the wafer, which further aggravates the quality control problem. As each wafer is subjected to additional processing steps requiring individual handling of the wafer, the chances of creating a defect increase. For example, photolithographical masking defects or scratches during the processing of the cap wafer are translated into the cap wafer during the through wafer etch, resulting in defects that can lead to the loss of individual die and even the entire wafer. Because processing of a wafer with an undesired through-hole typically cannot continue due to the adverse effect on equipment further along in the process, masking defects that result in the etching of such holes will result in the loss of the entire wafer, incurring a significant cost burden in the form of lost wafers, processing costs, and production time. Even small masking defects that do not create undesirable through-holes in the cap wafer can cause the loss of individual die. Because wafers are inspected by an automated system, the inspection process is likely to catch only those defects that are trained into the system, raising the potential that a defective die will pass the visual inspection.
In view of the above, any improvements in cap wafer processes over existing photolithographical techniques have the potential for providing quality, yield, and cost advantages.